The disclosure relates generally to a process for preparing a surface of a material for bonding to the surface of another material, more particularly, an oxygen plasma conversion process for treating a non-bondable surface of a substrate to make it bondable to the surface of another substrate, and more particularly, for making a non-bondable surface of a donor wafer bondable to the surface of a glass sheet to form a semiconductor on glass (SOG) substrate.
To date, the semiconductor material most commonly used in semiconductor-on-insulator structures has been single crystalline silicon. Such structures have been referred to in the literature as silicon-on-insulator structures and the abbreviation “SOI” has been applied to such structures. Silicon-on-insulator technology is becoming increasingly important for high performance thin film transistors, solar cells, and displays. Silicon-on-insulator wafers consist of a thin layer of substantially single crystal silicon 0.01-1 microns in thickness on an insulating material. As used herein, SOI shall be construed more broadly to include a thin layer of material on insulating semiconductor materials other than silicon and including silicon.
Various ways of obtaining SOI structures include epitaxial growth of silicon on lattice matched substrates. An alternative process includes the bonding of a single crystal silicon wafer to another silicon wafer on which an oxide layer of SiO2 has been grown, followed by polishing or etching of the top wafer down to, for example, a 0.05 to 0.3 micron layer of single crystal silicon. Further methods include ion-implantation methods in which hydrogen ions are implanted in a donor silicon wafer to create a weakened layer in the wafer for separation (exfoliation) of a thin silicon layer that is bonded to another silicon wafer with an insulating (or barrier) oxide layer in between. The latter method involving hydrogen ion implantation is currently considered advantageous over the former methods.
U.S. Pat. No. 5,374,564 discloses a “Smart Cut” hydrogen ion implantation thin film transfer and thermal bonding process for producing SOI substrates. Thin film exfoliation and transfer by the hydrogen ion implantation method typically consists of the following steps. A thermal oxide film is grown on a single crystal silicon wafer (the donor wafer). The thermal oxide film becomes a buried insulator or barrier layer between the insulator/support wafer and the single crystal film layer in the resulting of SOI structure. Hydrogen ions are then implanted into the donor wafer to generate subsurface flaws. Helium ions may also be co-implanted with the Hydrogen ions. The implantation energy determines the depth at which the flaws are generated and the dosage determines flaw density at this depth. The donor wafer is then placed into contact with another silicon support wafer (the insulating support, receiver or handle substrate or wafer) at room temperature to form a tentative bond between the donor wafer and the support wafer. The wafers are then heat-treated to about 600° C. to cause growth of the subsurface flaws resulting in separation of a thin layer or film of silicon from the donor wafer. The assembly is then heated to a temperature above 1000° C. to fully bond the silicon to the support wafer. This process forms an SOI structure with a thin film of silicon bonded to a silicon support wafer with an oxide insulator or barrier layer in between the film of silicon and the support wafer.
As described in U.S. Pat. No. 7,176,528, the ion implantation thin film separation technique has been applied more recently to SOI structures wherein the support substrate is a glass or glass ceramic sheet rather than another silicon wafer. This kind of structure is further referred to as silicon-on-glass (SiOG), although semiconductor materials other than silicon may be employed to form a semiconductor-on-glass (SOG) structure. Glass provides cheaper handle substrate than silicon. Also, due to the transparent nature of the glass, the applications for SOI can be expanded to areas such as displays, image detectors, thermoelectric, photovoltaic, solar cell and photonic devices.
One potential issue with SOG is that the glass support or handle substrate contains metal and other constituents that may be harmful to the silicon or other semiconductor layer. Therefore, a barrier layer may be required between the glass substrate and the silicon layer in the SiOG. In some cases, this barrier layer facilitates the bonding of the silicon layer to the glass support substrate by making the bonding surface of the silicon layer hydrophilic. In this regard, a SiO2 layer may be used to obtain hydrophilic surface conditions between the glass support substrate and the silicon layer. A native SiO2 layer may be formed on the donor silicon wafer when it is exposed to the atmosphere prior to bonding. Additionally, the anodic bonding process disclosed in U.S. Pat. No. 7,176,528 (e.g. application of heat and voltage during bonding, which causing ions to move in the glass) creates an “in situ” SiO2 layer between the silicon donor wafer or exfoliation layer and the glass substrate. If desired, a SiO2 layer may be actively deposited or grown on the donor wafer prior to bonding. Another type of a barrier layer provided by the anodic bonding process disclosed in U.S. Pat. No. 7,176,528 is a modified ion depleted layer of glass in the glass substrate adjacent to the silicon layer. Anodic bonding substantially removes alkali and alkali earth glass constituents that are harmful for silicon from about 100 nm thick region in the surface of glass adjoining the bond interface.
The anodically created substantially alkali free glass barrier layer and the in situ or deposited SiO2 barrier layers may, however, be insufficient for preventing sodium from moving from the glass substrate into the silicon layer. Sodium readily diffuses and drifts in SiO2 and glasses under the influence of an electric field at slightly elevated temperatures, even at room temperature, possibly resulting in sodium contamination of the silicon layer on the glass substrate. Sodium contamination of the silicon layer may cause the threshold voltages of transistors formed in or on the SiOG substrate to drift, which in turn may cause circuits built on the SiOG substrate to malfunction.
Silicon nitride, Si3N4, is a much stronger barrier against movement of sodium, alkali metals, and other elements in the glass support substrate 102 into the silicon exfoliation layer 122 than either an ion depleted glass barrier layer 132 created by anodic bonding or an in situ or deposited SiO2 barrier layer. Si3N4 is not, however, a material that is readily bondable to glass. Two smooth surfaces become bondable if both have the same hydrophilicity sign, e.g. if they are either both hydrophilic or both hydrophobic. By virtue of its chemical composition Si3N4 is hydrophobic, whereas glass surfaces can be easily rendered hydrophilic, but cannot readily be rendered hydrophobic. Therefore, the surface of the Si3N4 barrier layer should be treated to make it hydrophilic, thereby making the bonding surface of the donor wafer hydrophilic and readily bondable to the glass support substrate. Alternatively, the surface of the Si3N4 barrier layer may be coated with an auxiliary hydrophilic material layer or film, such as SiO2 or other oxide, in order to make it hydrophilic.
PECVD deposition or growth of SiO2 and other materials is well developed, and can be used for cost-efficient coating in mass production of oxide films. However, when growing a SiO2 film on a Si3N4 barrier layer that also performs a stiffening function as disclosed herein, it is difficult to grow uniform silicon dioxide films of the small thickness required to maintain the stiffening function. Other methods of depositing or growing SiO2 or other oxide films are known in the art, but these are generally too expensive to be used for making SiOG cost effectively and are generally not compatible with bonding. Moreover, deposition processes typically increase surface roughness, while low roughness is one of the requirements for effective bonding. It has been found that a surface roughness under 0.5 nm RMS, or under 0.3 nm RMS for 20×20 μm2 AFM scan is required for defect free bonding, whereas deposition processes typically produce films having surface roughness above 0.3 nm RMS for 20×20 μm2 AFM scan. Thus, additional smoothing of a deposited film would likely be required to ensure defect free bonding. Chemical mechanical polishing can be used to improve the roughness. However, the nitride barrier layer is a hard film, and polishing of such a film is an expensive operation. Also, the polishing itself is not enough to make the nitride surface bondable.
As described above, SiO2 is bondable to glass, as its surface can be easily rendered hydrophilic by simple cleaning processes. Deposition of the SiO2 film over a silicon nitride barrier layer is possible, but not preferable, because it results in an increase in surface roughness. Conversion of the surface of the Si3N4 barrier layer into an oxide by thermal oxidation is possible, but not preferred either. The thermal oxidation of silicon nitride requires temperatures exceeding 1000 C. At these temperatures silicon rectangular tiles warp and thus become non-bondable.
Another potential problem observed with SiOG substrates is the occurrence of micro structural defects in the form of canyons and pin holes in the thin silicon layer transferred during exfoliation of the silicon layer (the exfoliation layer) from the donor wafer. The canyons and pin holes may penetrate entirely through the silicon layer to the underlying glass substrate. When transistors are made in the silicon layer with the canyons and pin holes, the canyons and pin holes are likely to disrupt proper transistor formation and operation. Many of the canyons and the pinholes in the as transferred surface may be too deep to be easily removed with finishing operations such as polishing and etching.
The degradation in performance of silicon metal-oxide-semiconductor (MOS) devices with scaling caused by fundamental material limitations is forcing the semiconductor industry to consider extraordinary measures. Changes in semiconductor device structure (such as various forms of double-gated devices), alteration of semiconductor material properties in the channel region (such as SiGe alloys or strained silicon), and replacement of silicon altogether as the substrate material for the fabrication of semiconductor devices are all being considered. In view of the many challenges of introducing any of the preceding technologies into full production, other options that may reuse much of the silicon infrastructure and processing knowledge are attractive.
Substituting germanium for silicon as the semiconductor substrate material is one alternative that has the potential to use much of the existing silicon infrastructure and processing knowledge. The availability of good quality, bulk germanium wafers as large as 200 mm, combined with significantly larger carrier mobility for both electrons and holes for germanium compared to silicon are two positives of using germanium. Germanium is also a substrate of choice, because it can be made much thinner and lighter than gallium arsenide substrates, while still providing a suitable template for gallium arsenide (GaAs) epitaxy. GaAs is used to make devices such as microwave frequency integrated circuits (MMICs), infrared light-emitting diodes, laser diodes and solar cells. Compound III-V semiconductors grown on bulk germanium substrates have been used to create multi junction solar cells with efficiencies greater than 30%. However, these are prohibitively expensive for all but space applications. The Ge support or handle substrate constitutes a significant portion of the cost of Ge-based solar cells. There is a need in the art for a more affordable support or handle substrate having Ge surface or seed layer.
Germanium/Silicon (GE/Si) structures (or germanium on insulator (GeOI) substrates) formed by wafer bonding and layer transfer of a thin crystalline Ge layer by hydrogen implantation induced exfoliation have been considered as a way to reduce the product cost while maintaining solar cell device performance. By transferring thin, single-crystal layers of Ge from a bulk donor Ge wafer to a less expensive Si handle substrate, or another suitable less expensive semiconductor material handle substrate, or even to a glass substrate, the cost of the support substrate may be greatly reduced. By polishing and re-using the donor Ge wafer through a polish process, a single 300-μm-thick Ge donor wafer may serve as a source for the transfer of in excess of 100 thin Ge exfoliation or device layers, providing even greater cost savings on the production of a support substrate with a Ge surface or seed layer. Extremely high crystal-quality engineered germanium-on-insulator (GeOI) substrates have been created for next-generation processor, memory, MEMS and solar applications in this fashion.
GeOI structures may be formed using the above described ion implantation and thermal or anodic bonding thin film transfer processes as. However, these processes are not directly transferable to the transfer of germanium film to a glass handle substrate. Mechanical initiation of the cleaving action enables separation of the exfoliation layer at relatively low temperatures, such as at room temperature, thereby potentially enabling applications with severe thermal budget constraints, such as film transfer to glass substrates, and a reduction overall costs. However, the as-cleaved surface of the transferred germanium exfoliation layer or film exhibits a significant roughness on the order of 200 Ångstroms root mean square (RMS). This process therefore requires an additional step, such as chemical-mechanical polishing (CMP) or an epitaxy smoothing (ES) process, to reduce the surface roughness and thin the Ge exfoliation layer to the final desired finish and thickness. Moreover, GeOG structures made employing traditional Smart-Cut processes or anodic bonding processes exhibit poor Ge film uniformity. The Ge film does not bond well to the glass, and may require external pressure to force bonding of the GE layer to the glass. The Smart-Cut process with pressure forced bonding, however, produces Ge films containing fractures, cracks, and voids and makes the layer transfer difficult to control.
There is a need in the art for a process, surface chemistry and/or surface treatment for economically improving the transfer and bonding of a Ge layer to a support substrate, such as a glass, glass ceramic, or semiconductor substrate. There also is a need in the art for a process, surface chemistry and/or surface treatment for economically improving the bondability of a silicon nitride barrier layer to support substrate, such as a glass, glass ceramic, or semiconductor substrate.
No admission is made that any reference cited herein constitutes prior art. Applicant expressly reserves the right to challenge the accuracy and pertinence of any cited documents.